60 Relationship Between Main Memory and Working Memory

60 Relationship Between Main Memory and Working Memory #

In this lesson, we mainly explain the relationship between the main memory and the working memory.

CPU has multiple levels of caches, causing data expiration during reads #

Due to the fast processing speed of the CPU, memory appears to be slow in comparison. To improve the overall efficiency of the CPU and reduce idle time, there is a cache layer, or the cache layer, between the CPU and the memory. Although the capacity of the cache is smaller than that of the memory, the speed of the cache is much faster than that of the memory. Among them, the speed of the L1 cache is only second to that of the register. The structural diagram is as follows:

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In the diagram, from bottom to top, it shows the memory, L3 cache, L2 cache, L1 cache, and finally, the four cores of the CPU at the top. From memory to L3 cache, and then to L2 and L1 cache, they get closer and closer to the CPU cores. The closer they are to the cores, the smaller their capacity and the faster their speed. It is because of the existence of the cache layer that our CPU can perform better.

In fact, the visibility problem of shared variables between threads is not directly caused by multiple cores, but by the L3 cache, L2 cache, and L1 cache, that is, the multiple levels of caches: when each core retrieves data, it reads the data from the memory layer by layer. Likewise, subsequent modifications to the data are first written to their own L1 cache and then synchronized down layer by layer until they are eventually flushed back to the memory.

Suppose core 1 modifies the value of variable a and writes it to its own L1 cache, but has not had a chance to synchronize it down yet. Since core 1 has its own L1 cache, core 4 cannot directly read the value of core 1’s L1 cache. Therefore, for core 4, the value of variable a is not the latest value modified by core 1. The value read by core 4 may be an expired value, which leads to the occurrence of visibility issues in multithreading.

The abstraction of JMM: Main memory and Working memory #

What are the main memory and working memory #

As a high-level language, Java abstracts away the details of multiple levels of caches, such as L1 cache, L2 cache, and L3 cache, and defines a set of specifications for reading and writing data with JMM. We no longer need to concern ourselves with the issues of multiple levels of caches, such as L1 cache, L2 cache, and L3 cache. Instead, we only need to focus on the concepts of main memory and working memory abstracted by JMM. To help you understand more easily, refer to the following diagram:

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Each thread can only directly access its own working memory and cannot directly operate on the main memory. The contents of the variables in the working memory are copies of the shared variables in the main memory. The communication between the main memory and the working memory is controlled by JMM.

The relationship between main memory and working memory #

JMM has the following rules:

(1) All variables are stored in the main memory, and each thread has its own independent working memory. The content of the variables in the working memory is a copy of the corresponding variables in the main memory.

(2) Threads cannot directly read/write variables in the main memory, but they can operate on variables in their own working memory and then synchronize them to the main memory. In this way, other threads can see the modifications.

(3) The main memory is shared by multiple threads, but threads do not share their own working memories. If threads need to communicate with each other, they must rely on the main memory for intermediation.

With these rules in mind, you may have a deeper understanding of the above diagram. From the diagram, you can see that each variable in the working memory is a copy of the corresponding variable in the main memory, acting as a replica. Also note that there is no direct connection between different working memories in the diagram. Communications between working memories need to be relayed through the main memory.

Because all shared variables exist in the main memory, each thread has its own working memory, which stores copies of the variables. Therefore, these copies can become obsolete. Let’s take an example: if a variable x is modified by thread A but hasn’t been synchronized to the main memory yet, thread B cannot see the modification. Therefore, the value of x read by thread B at this moment is an outdated value, leading to the occurrence of visibility issues.

That concludes the content of this lesson. This lesson mainly introduced the multi-level cache structure of the CPU and the abstract structure of the JMM main memory and working memory. It also explained the relationship between the main memory and the working memory. After listening to this lesson, you will have a better understanding of why visibility issues can occur.